VLSI Research Group: Publications and Talks

Members or former members of the VLSI Research Group are shown in italics.

Proximity communication circuits and packaging

• J. Mitchell, J. Cunningham, A.V. Krishnamoorthy, R. Drost, R. Ho, "Integrating novel packaging technologies for large-scale computer systems," to appear in 2009 ASME/Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS, and NEMS Conference (Interpack2009), June 2009.
• I. Shubin, E.M. Chow, J. Cunningham, D. DeBruyker, C. Chua, B. Cheng, J. Knights, K. Sahasrabuddhe, Y. Luo, A. Chow, J. Simons, A. Krishnamoorthy, R. Hopkins, R. Drost, R. Ho, D. Douglas, J. Mitchell, "Novel Packaging with Rematable Spring Interconnect Chips for MCMs," to appear in 2009 IEEE Electronic Components and Technology Conference (ECTC2009), May 2009.
• T. Sze, M. Giere, B. Guenin, N. Nettleton, D. Popovic, R. Drost, R. Hopkins, R. Ho, S. Bezuk, "Proximity interconnect flip-chip package with micron chip-to-chip alignment tolerances," to appear in 2009 IEEE Electronic Components and Technology Conference (ECTC2009), May 2009.
• A. Chow, R. Hopkins, R. Drost, R. Ho, "Enabling Technologies for Multi-Chip Integration using Proximity Communication," 5th Annual IEEE Int'l Symposium on VLSI Design, Automation, and Test (VLSI-DAT2009), April 2009.
• A. Chow, D. Hopkins, R. Drost, R. Ho, "Exploiting capacitors in high-performance computer systems," 4th Annual IEEE Int'l Symposium on VLSI Design, Automation, and Test (VLSI-DAT2008), April 2008.
• A. Chow, R. Hopkins, R. Ho, R. Drost, " Measuring 6D chip alignment in multi-chip packages," 6th Annual IEEE Conference on Sensors (SENSORS2007), October 2007. (Slides)
• R. Hopkins, A. Chow, R. Bosnyak, B. Coates, J. Ebergen, S. Fairbanks, J. Gainsley, R. Ho, J. Lexau, F. Liu, T. Ono, J. Schauer, I. Sutherland, R. Drost, "Circuit techniques to enable 430 Gb/s/mm2 Proximity Communication," Digest of Technical Papers, IEEE International Solid-State Circuits Conference (ISSCC2007), February 2007, pp. 368-9.
• J. Ebergen, A. Chow, B. Coates, J. Schauer, R. Hopkins, "An asynchronous high-throughput control circuit for proximity communication," 12th International Symposium on Asynchronous Circuits and Systems, March 2006. (Slides)
• R. Drost, C. Forrest, B. Guenin, R. Ho, A. Krishnamoorthy, D. Cohen, J. Cunningham, B. Tourancheau, A. Zingher, A. Chow, G. Lauterbach, I. Sutherland, "Challenges in Building a Flat-Bandwidth Memory Hierarchy for a Large-Scale Computer with Proximity Communication," 13th Annual IEEE Symposium on High Performance Interconnects, August 2005. (Slides)
• R. Drost, I. Sutherland, "Proximity communication and time," IEEE International Symposium on Asynchronous Circuits and Systems, March 2005, pp. xii. (Slides)
• R. Drost, R. Hopkins, R. Ho, I. Sutherland, "Proximity Communication," IEEE Journal of Solid-State Circuits, Vol. 39, Number 9, September 2004, pp. 1529-36.
• R. Drost, R. Ho, R. Hopkins, I. Sutherland, "Electronic Alignment for Proximity Communication," Digest of Technical Papers, IEEE International Solid-State Circuits Conference, February 2004, pp. 144-5.
• R. Drost, R. Hopkins, I. Sutherland, "Proximity Communication," Proceedings, IEEE Custom Integrated Circuits Conference, September 2003, pp. 469-472.

Optical communication

• X. Zheng, J. Cunningham, P. Koka, H. Schwetman, J. Lexau, R. Ho, I. Shubin, A. Krishnamoorthy, J. Yao, A. Mekis, T. Pinguet, "A macrochip interconnection network enabled by silicon nanophotonic devices," to appear in Journal of Nanoscience and Nanotechnology, Special Issue on Nanophotonics and Nanooptics, 2009.
• A. Krishnamoorthy, R. Ho, X. Zheng, J. Lexau, P. Koka, G. Li, I. Shubin, J. Cunningham, "Computing microsystems based on silicon photonic interconnects," to appear in Proceedings of the IEEE, 2009.
• X. Zheng, J. Lexau, J. Cunningham, A. Krishnamoorthy, D. Rolston, R. Ho, "BGA package co-integration of electrical, optical, and capacitive interconnects," to appear in 2009 IEEE Electronic Components and Technology Conference (ECTC2009), May 2009.
• J. Cunningham, A. Krishnamoorthy, X. Zheng, G. Li, R. Ho, J. Lexau, I. Shubin, K. Raj, "Communication in macrochips using silicon photonics for high-performance and low-energy computing," 5th Annual IEEE Int'l Symposium on VLSI Design, Automation, and Test (VLSI-DAT2009), April 2009.
• X. Zheng, P. Koka, H. Schwetman, J. Lexau, R. Ho, I. Shubin, J. Cunningham, A. Krishnamoorthy, "A Silicon photonic WDM network for high performance macrochip communications," Proceedings, SPIE Photonics West, Vol. 7221: Photonics packaging, integration, and interconnects IX, 2009.
• A. Krishnamoorthy, R. Ho, X. Zheng, H. Schwetman, J. Lexau, P. Koka, G. Li, I. Shubin, J. Cunningham, "The integration of silicon photonics and VLSI electronics for computing systems intra-connect," Proceedings, SPIE Photonics West, Vol. 7220: Silicon photonics IV, 2009.
• X. Zheng, P. Koka, H. Schwetman, J. Lexau, R. Ho, J. Cunningham, A. Krishnamoorthy, "Silicon photonic WDM point-to-point network for multi-chip processor interconnects," 5th Annual IEEE International Conference on Group IV Photonics (GFP2008), September 2008.
• J. Cunningham, X. Zheng, I. Shubin, R. Ho, J. Lexau, A. Krishnamoorthy, M. Asghari, D. Feng, J. Luff, H. Liang, C. Kung, "Optical proximity communication in packaged SiPhotonics," 5th Annual IEEE International Conference on Group IV Photonics (GFP2008), September 2008.
• A. Krishnamoorthy, J. Lexau, X. Zheng, J. Cunningham, R. Ho, and O. Torrudbakken, "Optical interconnects for present and future high-performance computer systems," 16th Annual IEEE Symposium on High Performance Interconnects (HOT-I2008), August 2008.
• A. Krishnamoorthy, J. Cunningham, X. Zheng, G. Li, I. Shubin, J. Li, R. Ho, J. Lexau, H. Schwetman, P. Koka, B. O'Krafka, A. Charlesworth, "Ultrascale Nanophotonic Intrachip Communication for high-performance computing systems," Optical Society of America--Integrated Photonics and Nanophotonics Research and Applications (IPNRA2008), July 2008.
• A. Krishnamoorthy, R. Ho, B. O'Krafka, J. Cunningham, J. Lexau, X. Zheng, "Potentials of Group IV Photonics Interconnects for 'Red-shift' Computing Applications," 4th Annual IEEE International Conference on Group IV Photonics (GFP2007), September 2007.
• J. Lexau, X. Zheng, J. Bergey, A. Krishnamoorthy, R. Ho, R. Drost, J. Cunningham, "CMOS integration of capacitive, optical, and electrical interconnects," 10th IEEE Int'l Interconnect Technology Conference (IITC2007), June 2007, pp. 78-80.
• X. Zheng, J. Lexau, J. Bergey, J. Cunningham, R. Ho, R. Drost, A. Krishnamoorthy, "Optical transceiver chips based on co-integration of capacitively-coupled proximity interconnects and VCSELs," IEEE Photonics Technology Letters, Vol. 19, Number 7, April 2007, pp. 453-455.
• A. Krishnamoorthy, D. Huang, T. Sze, R. Drost, R. Ho, H. Davidson, R. Lytel, "Challenges and potentials for multiterabit-per-second optical transceivers," Digest of the LEOS Summer Topical Meetings, Biophotonics/Optical Interconnects and VLSI Photonics/WMB Microcavities, June 2004, pp. 28-30.

Electrical links

• R. Drost, B. Wooley, "An 8-Gb/s/pin simultaneously bidirectional transceiver in 0.35-um CMOS," IEEE Journal of Solid-State Circuits, Vol. 39, Issue 11, Nov. 2004, pp. 1894-1908.
• H. Hatamkhani, K.-L. Wong, R. Drost, C.-K. Yang, "A 10-mW 3.6-Gbps I/O transmitter," IEEE Symposium on VLSI Circuits, June 2003, pp. 97-98.

On-chip wires, networks-on-chips, switching

• P. Khanduri, A. Wood, D. Cohen, I. Birkeli, F. Sem-Jacobsen, "Flat tree networks," to appear in 2009 ASME/Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS, and NEMS Conference (Interpack2009), June 2009.
• T. Ono, M. Greenstreet, "A modular synchronizing FIFO for NoCs," to appear at the 3rd ACM/IEEE International Symposium on Networks-on-Chip (NOCs2009), May 2009.
• I. Jones, S. Yang, M. Greenstreet, "Synchroniser Behaviour and Analysis," to appear in the 15th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC2009), May 2009.
• H. Eberle, P. Garcia, J. Flich, J. Duato, R. Drost, N. Gura, R. Hopkins, W. Olesinki, "High-radix crossbar switches enabled by proximity communication," Proceedings of the 2008 ACM/IEEE conference on Supercomputing, November 2008.
• R. Ho, T. Ono, F. Liu, R. Hopkins, A. Chow, J. Schauer, R. Drost, "High-speed and low-energy capacitively-driven wires," IEEE Journal of Solid-State Circuits, Vol. 43, Issue 1, Jan. 2008, pp. 52-60.
• J. Owens, W. Dally, R. Ho, D. Jayasimha, S. Keckler, L-S. Peh, "Research challenges for on-chip interconnection networks," IEEE Micro, Vol. 27, Issue 5, September-October 2007, pp. 96-108.
• H. Eberle, A. Chow, B. Coates, J. Cunningham, R. Drost, J. Ebergen, S. Fairbanks, J. Gainsley, N. Gura, R. Ho, R. Hopkins, A. Krishnamoorthy, J. Lexau, W. Olesinski, T. Ono, J. Schauer, "Multi-terabit switch fabrics enabled by Proximity Communication," 19th Annual Hot Chips Symposium, August 2007.
• R. Ho, T. Ono, F. Liu, R. Hopkins, A. Chow, J. Schauer, R. Drost, "High-speed and low-energy capacitively-driven wires," Digest of Technical Papers, IEEE International Solid-State Circuits Conference (ISSCC2007), February 2007, pp. 412-3.
• R. Ho, "Technology Scaling and the Future of Interconnect," Invited talk, 7th IEEE Int'l Workshop on System Level Interconnect Prediction, April 2005. (Slides)
• R. Ho, R. Drost, J. Gainsley, "Long Wires and Asynchronous Control," Digest of Technical Papers, IEEE International Symposium on Asynchronous Circuits and Systems, April 2004, pp. 240-9. (Slides)

Reliability

• A. Dixit, R. Heald, A. Wood, "Trends from Ten Years of Soft Error Experimentation," Proceedings, System Effects of Logic Soft Errors (SELSE2009), March 2009.
• J. Ebergen, "Synchrony and Asynchrony in VLSI," Tutorial for Dagstuhl Seminar, "Fault-tolerant distributed algorithms in VLSI chips," Sept 2008. (Slides.)
• J. Ebergen, "VLSI tutorial," Tutorial for Dagstuhl Seminar, "Fault-tolerant distributed algorithms in VLSI chips," Sept 2008. (Slides.)
• B. Charron-Bost, S. Dolev, J. Ebergen, U. Schmid, "Fault-tolerant distributed algorithms on VLSI chips," Dagstuhl Seminar 08371 Proceedings, 2008.
• I. Parulkar, A. Wood, J. Hoe, B. Falsafi, S. Adve, J. Torrellas, S. Mitra, "OpenSPARC: An Open Platform for Hardware Reliability Experimentation," Proceedings, System Effects of Logic Soft Errors (SELSE2008), March 2008.
• A. Wood, S. Nathan, "RAS by the Yard," Proceedings, International Conference on Dependable Systems and Networking (DSN2007), June 2007. (Slides)
• A. Wood, S. Nathan, T. Tsai, C. Vick, L. Votta, A. Vetteth, "Multi-Tier Checkpointing for Peta-Scale Systems," Proceedings, International Conference on Dependable Systems and Networking (DSN2005), July 2005.
• G. Wang, K. Pattabiraman, Z. Kalbarcyzk, R. Iyer, C. Vick, L. Votta, A. Wood, "Modeling Coordinated Checkpointing for Large-Scale Supercomputers," Proceedings, International Conference on Dependable Systems and Networking (DSN2005), July 2005.

Logical effort, CAD tools, power-energy optimization, intervals

• S. Rubin, G. Garreton, "3D visualization of integrated circuits in the Electric VLSI design system," to appear in 2009 Design Automation Conference, July 2009.
• D. Nadezhin, "An exit hole method for verified solution of IVPs for ODEs using linear programming for the search of tight bounds," Submitted to SCAN'08 Proceedings, Sun Microsystems Memo #SML2009-0028, January 2009.
• G. Garreton, "VLSI CAD research at Sun Labs," Japan-America Frontiers of Engineering, National Academy of Engineering Symposium, Nov 2008.
• D. Nadezhin, "A differential inequalities method for verified solution of IVPs for ODEs using linear programming for the search of tight bounds," 13th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic, and Verified Numerical Computing, October 2008.
• S. Rubin, "Gridless wire routing using cost functions and multiple processors," Sun Microsystems memo #SML2008-0232, May 2008.
• G. Garreton, " Multi-threading in Electric, a Java VLSI CAD Tool, " Java User Group Presentation, Universidad Andres Bello, Chile May 2008.
• D. Nadezhin, "Validated method for IVPs for ordinary differential equations based on Chaplygin's inequalities," Sun Microsystems memo #SML2008-0173, April 2008.
• D. Nadezhin, "An abstract for the SCAN 2008 Symposium on Scientific Computing, Computer Arithmetic and Verified Numerical Computations," Sun Microsystems Memo #SML2008-0186, April 2008.
• G. Garreton, "Surveying external Electric users," Sun Microsystems Memo #SML2008-0114, April 2008.
• G. Garreton, "Electric VLSI design system," Publicly released poster from Sun Lab's Open House, Sun Microsystems Memo #SMl2007-0192, April 2007.
• G. Chen, J. Ebergen, J. Cheng, "Constrained circuit optimization using logical effort," Sun Microsystems memo #SML2007-0336.
• S. Rubin, "Multithreading in the Electric VLSI design system," Sun Microsystems memo #SML2006-0316, September 2006.
• S. Rubin, "Improving display speed in Electric (TM)," Sun Microsystems Memo #SML2005-0523, October 2005.
• G. Garreton, "Electric, a VLSI CAD framework using Java technology," Invited talk, Dept. of Computer Science, Catholic University, Santiago, Chile, May 2005. (Slides)
• J. Ebergen, J. Gainsley, P. Cunningham, "Transistor sizing: how to control the speed and energy consumption of a circuit," IEEE International Symposium on Asynchronous Circuits and Systems, April 2004, pp. 51-61. (Slides)
• D. Harris, "Logical Effort Tutorial," IEEE International Solid-State Circuits Conference, February 2001, based on the book by Sutherland, Sproull, and Harris. (Slides)
• I. Sutherland, B. Sproull, D. Harris, "Logical Effort: Designing Fast CMOS Circuits," Morgan Kaufmann Publishers, 1999.
• D. Harris, "Logical Effort: Designing for speed on the back of an envelope," Talk given at Stanford University, August 1998, based on the book by Sutherland, Sproull, and Harris. (Slides)
• I. Sutherland, B. Sproull, "Logical Effort: Designing for speed on the back of an envelope," Proceedings of the 1991 University of California Santa Cruz Conference on Advanced Research in VLSI, C. Sequin, ed. MIT Press, 1991, pp. 1-16. (A few slides from 1997)

Processors, functional blocks, process characterization

• I. Benko, M. Greenstreet, "TPE: A network of closely coupled computational elements," SML# 2008-0443, Sep 2008
• D. Patil, O. Azizi, M. Horowitz, R. Ho, R. Anantharaman, "Robust energy-efficient adder topologies," 18th IEEE Symposium on Computer Arithmetic (ARITH2007), June 2007, pp. 16-28.
• J. Ebergen, I. Sutherland, A. Chakraborty, "New division algorithms by digit recurrence," 38th Asilomar Conference on Signals, Systems, and Computers, Nov. 2004, pp. 1849-55. (Slides)
• D. Harris, I. Sutherland, "Logical effort of carry propagate adders," 37th Asilomar Conference on Signals, Systems, and Computers, November 2003, pp. 873-878.
• G. Konstadinidis, K. Normoyle, S. Wong, S. Bhutani, H. Stuimer, T. Johnson, A. Smith, D. Cheung, F. Romano, S. Yu, S. Oh, V. Melamed, S. Narayanan, D. Bunsey, C. Khieu; K.J. Wu, R. Schmitt, A. Dumlao, M. Sutera, J. Chau, K.J. Lin, W. Coates, "Implementation of a third-generation 1.1-GHz 64-bit microprocessor," IEEE Journal of Solid-State Circuits, Vol. 37, Issue 11, November 2002, pp. 1461-1469.
• A. Coulthard, J. Gainsley, J. Lexau, I. Sutherland, "The Duchess chips for process-specific wire capacitance characterization," Sun Microsystems Laboratories, Mountain View, CA. Technical Report TR-2001-0100, October 2001.
• W. Coates, J. Ebergen, J. Lexau, S. Fairbanks, I. Jones, A. Ridgway, D. Harris, I. Sutherland, "A counterflow pipeline experiment," Proceedings, Advanced Research in Asynchronous Circuits and Systems, April 1999, pp. 161-172. (Slides)
• R. Sproull, I. Sutherland, C. Molnar, "The counterflow pipeline processor architecture," IEEE Design and Test of Computers, Vol. 11, Issue 3, Fall 1994, pp. 48. (Slides, and illustrations)

Asynchronous circuits

• J. Ebergen, "Lessons from asynchronous design," Presentation to DARPA Science Research Council, October 2007. (Slides.)
• J. Ebergen, S. Furber, A. Saifhashemi, "Notes on pulse signaling," 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC2007), March 2007, pp. 15-24. (Slides)
• F. Liu, R. Ho, R. Drost, "On-chip samplers for test and debug of asynchronous circuits," 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC2007), March 2007, pp. 153-62. (Slides)
• A. Chow, W. Coates, R. Hopkins, "A configurable asynchronous pseudorandom bit sequence generator," IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC2007), March 2007, pp. 143-152. (Slides)
• J. Ebergen, "Circuits without clocks: What makes them tick?" Invited talk, Canadian Undergraduate Technology Conference, January 2006. (Slides)
• J. Ebergen, J. Gainsley, J. Lexau, I. Sutherland, "GasP control for domino circuits," IEEE International Symposium on Asynchronous Circuits and Systems, March 2005, pp. 12-22. (Slides)
• J. Ebergen, "Circuits without clocks: What makes them tick?" Invited talk, System-on-Chip Conference (SOC2004), November 2004. (Slides)
• J. Ebergen, D. Finchelstein, R. Kao, J. Lexau, R. Hopkins, "A fast and energy-efficient stack," IEEE International Symposium on Asynchronous Circuits and Systems, April 2004, pp. 7-16. (Slides)
• J. Ebergen, "Circuits without a clock: what makes them tick?" Keynote presentation at the Int'l Conference on Principles of Distributed Systems, December 2003. (Slides)
• J. Ebergen, "Circuits without a clock: what makes them tick?" Sun ONEDay 03 presentation, June 2003. (Slides)
• W. Coates, R. Drost, "Congestion and starvation detection in ripple FIFOs," IEEE International Symposium on Asynchronous Circuits and Systems, May 2003, pp. 36-45. (Slides)
• I. Sutherland, J. Ebergen, "Computers without clocks," Scientific American, November 2002, pp. 62-69.
• I. Benko, J. Ebergen, "Composing snippets," in Advances in Concurrency and Hardware Design (ACHD). Springer-Verlag's Lecture Notes, Computer Science, Vol. 2549, eds. J. Cortadella, A. Yakovlev, and G. Rozenberg. Springer-Verlag, 2002.
• W. Coates, J. Lexau, I. Jones, S. Fairbanks, I. Sutherland, "FLEETzero: an asynchronous switching experiment," IEEE International Symposium on Asynchronous Circuits and Systems, March 2001, pp. 173-182. (Slides)
• J. Ebergen, "Squaring the FIFO in GasP," IEEE International Symposium on Asynchronous Circuits and Systems, March 2001, pp. 194-205. (Slides)
• I. Sutherland, J. Lexau, "Designing fast asynchronous circuits," IEEE International Symposium on Asynchronous Circuits and Systems, March 2001, pp. 184-193. (Slides)
• I. Sutherland, S. Fairbanks, "GasP: A minimal FIFO control," IEEE International Symposium on Asynchronous Circuits and Systems, March 2001, pp. 12-22. (Slides)
• J. Lexau, J. Will, I. Jones, "EM emissions of an asynchronous test chip," Proceedings of the 14th Int'l Zurich Symposium & Technical Exhibition of Electromagnetic Compatibility, February 2001, pp. 579-584. (Slides)
• P. Shirvani, S. Mitra, J. Ebergen, M. Roncken, "DUDES: a fault abstraction and collapsing framework for asynchronous circuits," Proceedings, Advanced Research in Asynchronous Circuits and Systems, April 2000, pp. 73-82. (Slides)
• I. Benko, J. Ebergen, "Composing snippets," Proceedings, Advanced Research in Asynchronous Circuits and Systems, April 2000, pp. 23-33. (Slides)
• C. Molnar, I. Jones, "Simple circuits that work for complicated reasons," Proceedings, Advanced Research in Asynchronous Circuits and Systems, April 2000, pp. 138-149. (Slides)
• C. Van Berkel, C. Molnar, "Beware the three-way arbiter," IEEE Journal of Solid-State Circuits, Vol. 34, Issue 6, June 1999, pp. 840-848.
• J. Ebergen, R. Berks, "Response-time properties of linear asynchronous pipelines," Proceedings of the IEEE, Vol. 87, Issue 2, February 1999, pp. 308-18.
• C. Molnar, I. Jones, W. Coates, J. Lexau, S. Fairbanks, I. Sutherland, "Two FIFO ring performance experiments," Proceedings of the IEEE, Vol. 87, Issue 2, February 1999, pp. 297-307. (Slides)
• M. Shams, J. Ebergen, M. Elmasry, "Modeling and comparing CMOS implementations of the C-element," IEEE Transactions on VLSI Systems, Vol. 6, Issue 4, December 1998, pp. 563-7.
• J. Ebergen, "Circuits without clocks: what makes them tick?" Sun Labs Open House, May 1998. (Slides)
• W. Coates, J. Lexau, I. Jones, S. Fairbanks, I. Sutherland, "A FIFO data switch design experiment," Proceedings, Advanced Research in Asynchronous Circuits and Systems, April 1998, pp. 4-17.
• J. Ebergen, S. Fairbanks, I. Sutherland, "Predicting performance of micropipelines using Charlie diagrams," Proceedings, Advanced Research in Asynchronous Circuits and Systems, April 1998, pp. 238-246. (Slides)
• W. Clark, "FifoSim: A simulation program of rare functionality," Sun Microsystems Laboratories, Mountain View, CA, November 1997. (Execution of FifoSim)
• M. Shams, J. Ebergen, M. Elmasry, "Optimizing CMOS implementations of the C-element," Proceedings, IEEE Int'l Conference on Computer Design, October 1997, pp. 700-705.
• J. Ebergen, R. Berks, "Response time properties of some asynchronous circuits," Proceedings, Advanced Research in Asynchronous Circuits and Systems, April 1997, pp. 76-86.
• C. Molnar, I. Jones, W. Coates, J. Lexau, "A FIFO ring performance experiment," Proceedings, Advanced Research in Asynchronous Circuits and Systems, April 1997, pp. 279-289. (Slides)
• M. Shams, J. Ebergen, M. Elmasry, "A comparison of CMOS implementations of an asynchronous circuits primitive: the C-element," Int'l Symposium on Low Power Electronics and Design, August 1996, pp. 93-96.
• C. Molnar, H. Schols, "The design problem SCPP-A," Sun Microsystems Laboratories, Mountain View, CA. Technical Report TR-95-49, December 1995.

Collaborative environments

• T. Ono, G. Garreton, "Research in Industrial Labs: How Collaboration Aids Innovation, (RealMedia video) (QuickTime video)," CAHSI (Computing Alliance of Hispanic-Serving Institutions) Lecture, March 2008.
• T. Ono, G. Garreton, "Research in Industrial Labs: How Collaboration Aids Innovation (slides)," CAHSI (Computing Alliance of Hispanic-Serving Institutions) Lecture, March 2008.
• T. Ono, G. Garreton, "Research in industrial labs: How collaboration aids innovation," Grace Hopper Celebration of Women in Computing, October 2006. (Slides)

Other

• J. Ebergen, "To Yaeko, on the occasion of her retirement," Photo album, Dec 2008.
• J. Ebergen, "In memoriam Martin Rem," Brief presentation at ASYNC 2008.
• G. Garreton, "Wonderland with kids," CommunityCorner talk at JavaOne, July 2008.
• I. Sutherland, "A view of the task you take: A report to the NRC Commmittee on cryptography," Sun Microsystems Laboratories, Mountain View, CA. Perspectives Series 96-2, August 1996.
• I. Sutherland, "Technology and Courage," Sun Microsystems Laboratories, Mountain View, CA. Perspectives Series 96-1, April 1996.
• R. Sproull, I. Sutherland, "A comparison of codebook generation techniques for vector quantization," Data Compression Conference, March 1992, pp. 122-131.

Publications predating Sun Labs

1980s

• K. Frenkel, "An interview with Ivan Sutherland, 1988 Turing Award Recipient," Communications of the ACM, Vol. 32, Issue 6, June 1989, pp. 711-718.
• I. Sutherland, "Micropipelines: Turing Award," Communications of the ACM, Vol. 32, Issue 6, June 1989, pp. 720-738.

1970s

• I. Sutherland, "Three-dimensional data input by tablet," Proceedings of the IEEE, Vol. 62, Issue 4, April 1974, pp. 453-461.
• C. Molnar, W. Clark, W. Papian, "Macromodular Computer Design," Final Report for ARPA Contract SD-302 (vol 1-20), Computer Systems Laboratory, Washington University, St. Louis, MO, February 1974.
• I. Sutherland, D. Oestreicher, "How big should a printed circuit board be?" IEEE Transactions on Computers, Vol. C-22, Issue 5, May 1973, pp. 537-542.

1960s

• I. Sutherland, "A method for solving arbitrary-wall mazes by computer," IEEE Transactions on Computers, Vol. C-18, Issue 12, December 1969, pp. 1092-1097.
• T. Myer, I. Sutherland, "On the design of display processors," Communications of the ACM, Vol. 11, Number 6, June 1968, pp. 410-415.
• N. Ball, H. Foster, W. Long, I. Sutherland, R. Wigington, "A shared memory computer display system," IEEE Transactions on Electronic Computers, Vol. EC-15, no. 5, October 1966, pp. 750-756.
• I. Sutherland, "Sketchpad: A man-machine graphical communication system (Archival reprint edition of Sutherland's 1963 MIT Ph.D. Thesis, with a new forward by A. Blackwell and K. Rodden)," University of Cambridge Technical Report UCAM-CL-TR-574, September 2003.
• I. Sutherland, "Sketchpad: A man-machine graphical communication system (Archival reprint edition of Sutherland's 1963 MIT Ph.D. Thesis, with a new forward by A. Blackwell and K. Rodden)," University of Cambridge Technical Report UCAM-CL-TR-574, September 2003.

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