Paradigm Shift Aligns Advanced Technologies

By Al Riske

30.September.08 - Sometimes the distance between success and failure can be measured in microns.

The only way to make up the difference: Think differently.

Take Proximity Communications, for example. Engineers in Sun Labs have shown that this innovative approach can be used to transfer data between chips at incredible speeds. We're talking terabytes per second. All you have to do is make sure the chips are carefully coupled for wireless communication.

"We know proximity signaling works. They've tested it in the lab," says Distinguished Engineer Jack Cunningham. "But those test have been done with nanopositioning equipment to align the chips within the tolerances required."

The problem is current manufacturing techniques aren't that precise.

The brainchild of Sun Fellow Ivan Sutherland, Proximity Communication is being developed and refined by a number of Sun's top engineers, including Robert Drost, Hans Eberle, and Ron Ho. Cunningham leads the team working on point technologies for an advanced packaging solution.

The promise of Proximity Communication is huge. Imagine an array of multicore chips all tiled together to take on data-intensive applications, from predicting the weather to mapping distant galaxies. But how do you put all those chips together in a precise little package that can be produced at low cost?

"Industry-standard packaging technology today can't really place chips any more accurately than 50 to 100 microns," Cunningham says. "Proximity signaling requires accuracies an order of magnitude greater than that."

Fortunately, Cunningham brings to the project 25 years of experience in opto-electronics, where precision is the name of the game. So he and colleague Ashok Krishnamoorthy, who came from the same industry, know all about things like the etching chemistry of silicon.

"The innovation that Ashok and I have come up with is a concept that involves etching microfeatures into the chips," Cunningham says.

Simply put, tiny pits etched into the silicon, along with corresponding microspheres designed to fit into them just-so, bring the chips into the precise, slightly overlapping alignment needed for super-fast, low-power data exchange.

"You can bring a chip anywhere within 200 microns of those balls [on another chip] and let it go. It will self-align. As one chip comes down, the pits and balls lock into perfect alignment with the other chip," Cunningham explains.

"This now opens the door for very low-cost packaging with whatever's available in the industry as far as pick-and-place equipment. You overcome the limitations of the equipment because it's a self-aligning process."

Brilliant.

"That was the key innovation, and we've built a lot of intellectual property around that self-aligning concept. We can now be using stamped parts, injection-molded plastic, and almost industry-standard ceramics. All that's required is the self-aligning property of the ball and pit," Cunningham says.

The next problem, Cunningham points out, is how to get power to all the chips.

"The traditional way to power up chips is to bring power and ground in through C4 technology, which is a way of soldering chips onto a board," he says.

But Cunningham, along with Sun Fellow Jim Mitchell and others, is working on a less restrictive solution using microelectromechanical systems, or MEMS.

"We're looking at a MEMS-based spring with a partner, PARC. They make a microspring that has what we call a claw. That claw hangs from one chip and can touch the pads to another chip, so they make electrical contact," he says.

"For large assemblies of chips we can use what we call an interposer that has these microsprings all over it. That interposer comes down and brings power and ground to all these island chips. They're being slowly lowered to the pads and they compress as the ball-and-pit method brings all the chips into alignment."

The key advantage: Since the connections are made through compressed springs rather than permanent solder points, it's far easier to make changes.

"We bring down the interposer, we test all the chips, and if one of the chips is bad we can pull up the interposer and put in a new chip," Cunningham says.

Compare that to current methods:

"If your processor has 70 or 80 percent yield and you put four processors into a package, then the probability that all the chips work is low. So it becomes very expensive to make multichip modules," he says.

"While our competitors are fighting for the last bit of yield on a limited number of chips, we can now envision packages as large as 16 chips or 32 chips or 64 chips with this kind of technology."

Still, there is much work to be done.

"We've been talking to all the architecture teams within the products groups, and we're talking to our suppliers. We have to get this process transferred to our manufacturing partners. The good news is our partners who have industry-standard manufacturing platforms are very interested in working with us because they see the potential of the technology."

"Jack brings huge expertise in opto-electronics to the team working on Proximity Communications and is playing an integral part in making the technology practical to produce in volume," Sun CTO Greg Papadopoulos. "We have an enormous opportunity to fundamentally change the economics of large-scale silicon systems here."