| The Sedna project is about architectures and technologies for future data center interconnects that scale to thousands of compute nodes and to bandwidths of tens of terabits-per-second. Such a high-performance interconnect will lay the groundwork for operating data centers in a simpler and more cost-effective way. More specifically, it will drive the convergence of today's network and storage architectures towards a single networking infrastructure. Further, it will enable a more flexible infrastructure by allowing for virtualizing data center resources. This capability will be the foundation of newly emerging usage models in the form of grid and cloud computing.
The Sedna project team is developing and prototyping scalable switch architectures and technologies based on a novel packaging technology that revolutionizes the construction of large-scale switching fabrics in that it preserves the properties of a monolithic switch design and allows for building a switching fabric with unparalleled bandwidth density.
Sedna Proximity Communication Switch Prototypes
Vector Package |
BGA Package | Conferences
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Scalable Alternatives to Virtual Output Queuing. To appear at ICC 2009, IEEE Int. Conference on Communication. Dresden, June 14-18.
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High-Radix Crossbar Switches Enabled by Proximity Communication. SC08, Int. Conference for High Performance Computing, Networking, Storage and Analysis. Austin, Nov. 15-21, 2008.
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Flow Control in Output Buffered Switch with Input Groups. HPSR 2008, Int. Conference on High Performance Switching and Routing. Shanghai, May 15-18, 2008.
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Backlog Aware Scheduling for Large Buffered Crossbar Switches. ICC 2008, IEEE Int. Conference on Communications. Beijing, May 19-23, 2008.
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Low-Latency Scheduling in Large Switches. ANCS 2007, ACM/IEEE Symposium on Architectures for Networking and Communications Systems. Florida, Dec. 3-4, 2007.
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OBIG: the Architecture of an Output Buffered Switch with Input Groups for Large Switches. IEEE Globecom 2007, IEEE Globecom Communications Conference, Washington, Nov. 26-30, 2007.
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Backlog Aware Low Complexity Schedulers for Input Queued Packet Switches. Hot Interconnects 15, Symposium on High-Performance Interconnects, Stanford, Aug. 22-24, 2007.
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Multiterabit Switch Fabrics Enabled by Proximity Communication. Hot Chips 19, A Symposium on High Performance Chips, Stanford, Aug. 19-21, 2007.
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A Multi-Terabit Data Center Interconnect Based on Proximity Communication. ISC 2007, Int. Supercomputing Conference, Dresden, June 26-30, 2007.
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PWWFA: The Parallel Wrapped Wave Front Arbiter for Large Switches. HPSR 2007, IEEE Workshop on High Performance Switching and Routing, New York, May 30 - June 1, 2007. Awards |
