Project Fortress Overview

We are looking at how to apply the lessons learned from the Java (TM) Programming Language to the next generation of programming languages. Our focus is on applying dynamic compilation to high productivity computation.

In the shorter term, we've been looking at the general problem of constructing software for very large HPC systems (tens of thousands of processors, petabytes of memory). This has led to work on the following problems:

• Mathematical notation: We would like to reduce the time it takes for a domain expert to turn a mathematical specification into a working high-performance program. We are examining language changes which would enable computations to be written in a more mathematical format.
• Dimension checking: How can we provide support for static checking of units and physical dimensions in an object-oriented type system in a way that allows programmers to define new dimensions and units and to write programs that are polymorphic with respect to specific dimensions and units? How do we design such a system so that it is integrated with the rest of the type system?
• Communication efficiency: On a very large machine, communication bandwidth determines computation speed. We must design languages and architectures which are capable of moving large quantities of data in parallel with computation.
• Memory consistency: We can express a large memory using an enormous (possibly discontiguous) shared address space. However, in order to use resources (particularly bandwidth) efficiently, we must trade away the simplicity of cache coherent shared memory and manage consistency more explicitly. This requires support at all levels, from hardware to ISA to compiler to language.
• Synchronization: The usual shared-memory synchronization mechanisms (compare and swap, load locked/store conditional) must be implemented differently in the absence of cache coherence. Furthermore, they make certain kinds of operations difficult (such as asynchronous message sends, barrier synchronization, and parallel prefix). We are exploring alternative synchronization mechanisms and the hardware required to support them.

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