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ChameleonRobert Yung yung@sun.comDave Roberts droberts@sun.com Neil Wilhelm wilhelm@sun.com Overall objective:To demonstrate the feasibility of a processor-independent Sun system. To provide a platform for heterogeneous multi-processor (MP) system research. To provide a platform for binary translation research.
Objective for FY95Chameleon was started in the second half of FY95. The Chameleon project has three objectives: Build a PowerPC 604-based MBus card for the "PS-20" system, the chassis of the SPARCstation 20 product. Develop a P1275-compliant OpenBoot Prom 3.0 Implementation. Port a big-endian PPC Solaris to the "PS-20" system.
DescriptionChameleon provides the hardware and software components of a non-SPARC based Sun workstation prototype that runs Solaris. The hardware components of Chameleon are an MBus card containing a PowerPC (PPC) 604 and a IEEE P1275-compliant OpenBoot PROM (OBP) that can be used in an SS20 system to build a non-SPARC Sun workstation. The PowerPC (PPC) MBus card contains a PPC 604 CPU, an Altera PLD that controls the CPU, the external cache and Mbus interface, bus drivers, a PLL clock driver, and two sets of E-cache tag memories. The design is optimized for MP applications: both the internal data cache and the external unified E-cache are configured as write-back. This minimizes the peak bandwidth requirement at the E-cache and Mbus interfaces, and allows usage of slower E-cache SRAMs. Mbus snooping is filtered with two sets of E-cache tags: one for CPU accesses and the second for MBus snooping. The software components of Chameleon are a big-endian Solaris port to this platform and a native C-compiler. The big-endian PPC Solaris port is descended from the little-endian PPC port SunSoft has done to the PReP platforms. The PReP I/O system is replaced by the Sun4m I/O system of the SS-20 platform.
AccomplishmentsThe PPC 604-based MBus card is complete. The prototype MBus card is fully functional and works at speed (40Mhz and 50 MHz MBus). The CPU can run at 2X, 3X, or 4X the Mbus frequency. The port of a P1275 OBP (version 3.0) is mostly complete. The big-endian PPC Solaris port is complete, with basic Sun4m driver integration. Lessons Learned There are several things we learned in the course of designing the prototype MBus card. In particular, rapid prototyping of full-speed, full-function processor cards is possible with off-the-shelf parts. The easy-to-use MBus and the generic address/data interface of the PPC 604 were very helpful. Some specifics are: The entire design was done in 3-person-months. All components used on the Mbus card except the CPU are off-the-shelf. A PLD/FPGA (plus discrete buffers) offers a realistic alternative to full-custom or gate-array processor interface chips. A single Altera PLD is used to control CPU interface, the external cache and the Mbus interface. This PLD (plus external parts) provides the same functionality as the MXCC in a SPARC Mbus module.
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